This invention relates to a semiconductor device, and particularly to the structure of the metalized layer to which a semiconductor element is bonded and to which lead wires extended from the semiconductor element are connected when the element is in a package.
Semiconductor devices composed of compound semiconductor materials such as gallium/arsenic (GaAs) or indium/phosphor (InP), etc., have an expanding field of application because of their availability in a higher frequency range than silicon (Si) devices.
In semiconductor elements which are composed of compound semiconductor materials such as GaAs or InP, etc., the semiconductor substrate consists of a compound semiconductor having semi-insulation characteristics and an active region such as a Schottky barrier field-effect transistor is fabricated on the surface of the compound semiconductor. Such a semiconductor device has an electrode on the active region at the surface of the semiconductor element for the purpose of connection to a reference potential, for example, to the ground potential. The electrode for grounding the semiconductor device is then connected to a metalized layer via a lead wire within the package wherein the semiconductor device is housed.
The semiconductor element is bonded by being brazed onto a metalized layer which is formed on a substrate surface within the package.
FIG. 1 and FIG. 2 respectively disclose an existing package which hermetically seals a microwave GaAs field effect transistor element composed of such a compound semiconductor.
In these figures, 11 denotes an insulating substrate which is composed of a ceramic material such as alumina (Al.sub.2 O.sub.3). A metalized layer is selectively formed on one main surface of substrate 11, this metalized layer being basically composed of molybdenum (Mo) - manganese (Mn) or tungsten (W) with plating of gold (Au) at the surface. This metalized layer provides a metalized layer 13 on which a semiconductor element 12 is mounted and metalized layers 15 and 16 to which the lead wires (for example, the gold leads 14) extending from the electrodes of the semiconductor element 12 are connected.
The metalized layers 13, 15, and 16 extend to the other main surface of the insulating substrate 11 via the side surfaces of the insulating substrate 11, while the external connecting terminals 17, 17', 18, and 19 (which are composed of kovar, etc.) are mounted by brazing to the said metalized layer.
In addition, on one main surface of the substrate 11, a member or frame (for hermical sealing) 20 consisting of ceramic material is bonded. The frame 20 surrounds semiconductor element 12 and covers a part of the exposed surface of the substrate 11 and a part of the metalized layers 13, 15 and 16. Moreover, a cap (not illustrated), which is made of kovar or ceramic material, is bonded covering the aperture of the frame 20 and thereby said semiconductor element 12, bonded on the metalized layer 13, is hermetically sealed.
In a semiconductor device having the structure outlined above, brazing material 21 (gold(Au)-tin(Sn), etc.) is used for bonding the semiconductor element 12 onto the metalized layer 13 as is shown in the enlarged view of FIG. 3. Since the brazing material 21 has been melted, it is spread to a wide area on the metalized layer 13 around the semiconductor element 12. Assuming that the semiconductor element is a GaAs field effect transistor, for example, and its source electrodes must be grounded through connection to the metalized layer 13, lead wires 23 and 23' must be kept away from the extensive brazing material 21 when they connect the source electrodes 22 and 22' of semiconductor element 12 to metalized layer 13.
In addition, exposure of a relevant semiconductor device to a high temperature after connection of such lead wires may cause brazing material 21 to flow up to the connecting points of the lead wires 23 or 23' on the metalized layer 13, thus lowering the bond strength of the lead wires and in some cases disconnecting them.
In FIG. 3, reference number 24 denotes a gate electrode forming the input electrode; reference number 25 denotes a drain electrode used as the output electrode; reference numbers 26 and 27 denote lead wires for connecting these electrodes and metalized layers 15 and 16 for external connections. Attempting to prevent the aforesaid phenomenon by lengthening lead wires 23 and 23' which extend to the metalized layer 13 from the bonding area of the semiconductor element 12, will increase the physical dimensions of the semiconductor device. Moreover, completely isolating the metalized layer on which the semiconductor element is bonded from the metalized layers to which the lead wires are connected has been considered, but this would make it difficult to perform the gold plating process.